Circuit Design Reports

IEEE 1149.1 Use in Design for Verification and Testability at Texas Instruments
sponsored by Texas Instruments, Inc.
WHITE PAPER: This document introduces those products that include ASIC cells, standard interface ICs, a bus master IC, a controller interface board for IBM compatibles, a high-speed scan interface, and software to control the scan bus.
Posted: 17 Mar 2002 | Published: 05 May 2000

Texas Instruments, Inc.

Design-for-Test Analysis of a Buffered SDRAM DIMM
sponsored by Texas Instruments, Inc.
WHITE PAPER: This document presents a design-for-test analysis of a buffered synchronous dynamic random access memory dual in-line memory module.
Posted: 11 Mar 2002 | Published: 13 Aug 1996

Texas Instruments, Inc.

Built-in Self-test (BIST) Using Boundary Scan
sponsored by Texas Instruments, Inc.
WHITE PAPER: This document shows how existing architectures can be modified to conform to IEEE 1149.1 architecture.
Posted: 09 May 2000 | Published: 01 Dec 1996

Texas Instruments, Inc.