sponsored by Texas Instruments, Inc.
Posted:  09 May 2000
Published:  01 Dec 1996
Format:  PDF
Length:  12  Page(s)
Type:  White Paper
Language:  English
ABSTRACT:
The IEEE standard boundary scan framework and four-wire serial testablity are having a positive impact on testing all levels of electronic assembly. The two form a basis from which other techniques are developed to facilitate testing of chips and systems. This document shows how existing architectures can be modified to conform to IEEE 1149.1 architecture. A boundary BIST approach is described and compared to a purely scan operated boundary test approach.



Author

Lee Whetsel
Senior Member Technical Staff



BROWSE RELATED RESOURCES
Architectures | Circuit Design | Integrated Circuit Test Equipment | Integrated Circuits | Standards | Testing

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