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ALSO CALLED: Random Access Memory
DEFINITION: Phase-change memory (PCM) is a form of computer RAM (random-access memory) that stores data by altering the state of the matter from which the device is fabricated. The structure of the material can change rapidly back and forth between amorphous and crystalline on a microscopic scale. In the amorphous or disordered phase, the material has high electrical resistance ; in the crystalline or ordered  … 

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RAM White Papers (View All Report Types)
6 Matches
Dell™Reliable Memory Technology
sponsored by DellEMC and Intel®
WHITE PAPER: This paper examines the root causes of memory errors and discusses and discusses the core concepts of technology designed to remediate and obviate these errors.
Posted: 12 Mar 2014 | Published: 12 Mar 2014

DellEMC and Intel®

Modern Infrastructure – Creating Tomorrow's Data Centers
sponsored by SearchDataCenter.com
WHITE PAPER: SaaS outsourcing is leaving many data centers feeling empty—and IT teams are confronting new management and outsourcing issues in the wake of the changes.
Posted: 17 Feb 2014 | Published: 17 Feb 2014

SearchDataCenter.com

Router Essentials
sponsored by Global Knowledge
WHITE PAPER: Build a basic foundation of knowledge about routers, the devices that allow you to move packets between networks, by reading this white paper.
Posted: 10 Dec 2008 | Published: 11 Oct 2008

Global Knowledge

Rational Asset Manager Made Practical
sponsored by IBM
WHITE PAPER: The eKit includes demos on how Rational Asset Manager tracks and audits your assets in order to utilize them for reuse.
Posted: 25 Nov 2008 | Published: 25 Nov 2008

IBM

Citrix XenApp 5.0: Preparing for a Successful Migration
sponsored by visionapp
WHITE PAPER: Citrix XenApp 5.0 offers new functionality: with preferential load balancing, preset values can now be applied to both specific users and particular applications.
Posted: 14 Nov 2008 | Published: 14 Nov 2008

visionapp

Design-for-Test Analysis of a Buffered SDRAM DIMM
sponsored by Texas Instruments, Inc.
WHITE PAPER: This document presents a design-for-test analysis of a buffered synchronous dynamic random access memory dual in-line memory module.
Posted: 11 Mar 2002 | Published: 13 Aug 1996

Texas Instruments, Inc.
6 Matches
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