How a "mesh" on-chip interconnect improves processor scalability

New Intel Mesh Architecture: The "Superhighway" of the Data Center

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Because processors play a fundamental role in data center optimization, the impact of design choices affecting scalability and efficiency become very apparent.

The task of adding more cores and interconnecting them to create a multi-core processor may sound simple, but the interconnects between CPU cores, memory hierarchy, and I/O subsystems provide critical pathways for data to flow among these subsystems, so they must be designed carefully.

This white paper examines one such design, using a Xeon Scalable processor from Intel, which implements a “mesh” on-chip interconnect topology that delivers low latency and high bandwidth among additional cores, memory, and I/O controllers. Read on to gain access to all the details of this new data center design. 

Vendor:
Intel
Posted:
08 Feb 2018
Published:
31 Dec 2017
Format:
PDF
Length:
3 Page(s)
Type:
White Paper
Language:
English
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