This document provides a detailed description of the implementation of the GSM enhanced full rate (EFR) speech encoder and decoder (codec) on the Texas Instruments TMS320C62x digital signal processor (DSP). Topics include program structure, code writing rules, data/program memory requirement, and performance evaluation. Issues on multichannel implementation and interrupts are also addressed. The EFR speech codec is defined by the European Telecommunications Standards Institute (ETSI) specifications GSM 06.51, 06.60, 06.61, 06.62, and 06.82. A reference C program is provided in GSM 06.53, along with a set of testing sequences. The code implemented on the C62x is fully bit compatible with the reference code on all testing sequences. The GSM EFR speech codec uses the algebraic code excited linear prediction (ACELP) algorithm, which is an analysis-by-synthesis algorithm and belongs to the class of speech coding algorithms known as code excited linear prediction (CELP). Therefore, the speech decoder is primarily a subset of the speech encoder. For every 20-ms speech frame, the EFR encoder extracts 57 parameters, as well as VAD information. These parameters include short-term (LP) parameters, adaptive excitation (LAG) parameters, and algebraic code excitation (CODE) parameters.